Typical amplifiers designs include single-FET amplifier stages and two-FET amplifier stages. Single-transistor designs are generally configured in one of three ways: common-source (common-emitter for bipolar transistors), common gate (common-base for bipolar transistors), and common drain or source follower (common-collector or emitter follower for bipolar transistors). A derivation on the common-source (common-emitter) configuration is referred to as a common-source (common-emitter) amplifier with source degeneration, which includes an emitter resistance that effectively lowers the gain of the amplifier.
Two-transistor amplifier designs are generally configured as follows: common-drain-common-source (common-collector-common-emitter for bipolar transistors), common-drain-common-drain (common-collector-common-collector for bipolar transistors), common-source-common-gate or cascode (common-emitter-common-base for bipolar transistors), and the common-drain-common-gate (common-collector-common-base for bipolar transistors). Recall that “Darlington pair” is sometimes used to refer to specific common-drain-common-source (common-collector-common-emitter) and common-drain-common-drain (common-collector-common-collector) configurations.
These single and/or two stage amplifier configurations can be used to form the stages of a multistage amplifier, with each stage providing various characteristics including input resistance, output resistance, voltage gain, and current gain. For instance, a typical cascode configuration (common-source-common-gate for FET amplifiers or common-emitter-common-base bipolar transistor amplifiers) has the input characteristics of a common source (common emitter) amplifier, and the output characteristics of a common gate (common base) amplifier.
Such an amplifier configuration provides a very high output resistance, which generally enables high voltage gain. In addition, no high frequency feedback from the output back to the input occurs, and the input Miller capacitance effect is minimized due to the low voltage gain of the common source (common emitter) configuration. In any such configurations, the amplifiers can be implemented in monolithic form (as an integrated circuit) or with a number of discrete components (separate active and passive components, such as transistors, capacitors and resistors).
The technology used to fabricate integrated circuits generally presents the circuit designer with a number of cost and process constraints for any one application. A primary cost constraint in the context of integrated circuits is the die area required to make an integrated circuit (IC) device. For example, an increased pin count of an IC package equates to increased package size, which increases cost per IC device. Process constraints, on the other hand, are more directly tied to the particular application in which the IC device is to be used.
For instance, metal oxide semiconductor (MOS) FETs are commonly used in the realization of integrated circuits configured to provide amplification of analog signals. In some applications, both dynamic range of the amplifier and radiation hardness of the materials that make up the amplifier IC are desirable traits. Dynamic range is generally the voltage range in which an amplifier can operate while meeting the performance requirements of the circuit. Radiation hardness is the characteristic of a material that indicates the extent to which that material can withstand nuclear or other radiation. There is a trade, however, between dynamic range and radiation hardness.
On one hand, the radiation hardness rating is higher (better) for integrated circuits made with thin gated oxide CMOS processes. On the other hand, the voltage range allowed by a FET fabricated with thin gated oxide CMOS processes is lower, relative to other IC processes. Typically, the trade is satisfied by favoring the higher voltage range, thereby necessitating the use of higher voltage range processes (as opposed to the favorable thinner gated oxide CMOS processes). A number of undesirable features are associated with these higher voltage range processes, such as reduced radiation hardness, larger layout die area, and slower speed. In addition, the range of the amplifier voltage swing is still limited by process ratings for a single FET.
What is needed, therefore, are techniques for extending the dynamic range of voltage swing for amplifiers and other integrated circuits fabricated using lower voltage rated processes that provide desirable features such as increased radiation hardness, higher speed logic, and compactness.